Design and Application of Programmable Speech Processor

為了提高通信系統的保密性，降低制造成本，需要進行專用處理器的設計。該文基于SELP(Sinusoidal Excitation Linear Prediction)算法模型原理，設計了一款高質量多速率語音專用處理器芯片。芯片使用可重構體系結構和超長指令字系統設計方法，將復雜度高的子程序進行優化，能夠顯著提高指令并行度。仿真結果表明：在該芯片上實現語音壓縮編碼算法，執行效率高于相同工藝水平的通用數字信號處理器，并保持原有編碼質量。該處理器能夠實現多種類型的語音壓縮算法，使語音算法可以達到高保密性、低復雜度和易開發性。
關鍵詞：語音信號處理；語音壓縮；專用芯片；可重構體系結構；超長指令字
【Abstract】Programmable application-specific processor is necessary in order to increase communication system security and reduce manufacturecost. An application special processor is introduced for high quality multi-rate speech compression algorithm based on SELP(sinusoidal excitationlinear prediction) model. The chip uses reconfigurable architecture and VLIW(very long instruction word) system design method, by which highcomplexity sub programs are optimized to get a remarkable instructions parallel. The simulation result shows speech compression algorithms whichare implemented on this chip have higher efficiency than that on universal DSP(digitalsignal processor) under the same technical level, whilemaintaining the original coding quality. The chip can implement different types of speech compression algorithms and reach to good security, lowcomplexity and development convenience.
【Key words】Speech signal processing; Speech compression; Application-specific integrated circuit(ASIC); Reconfigurable architecture; Very longinstruction word

可重構體系體系結構，是指某一計算系統能夠利用可重用的硬件資源，根據不同的應用需求，靈活地改變自身體系結構，以便提供與之相匹配的體系結構[1]。已有可重構體系實現了語音算法的某些特定部分，如自適應多速率算法中的代數碼本搜索[2]、原型編碼器中的小波變換[3]以及有限脈沖響應濾波器[4]等，但使用協處理器使硬件規模仍然偏大，且只能對一類語音算法適用。如能在整體芯片設計中采用可重構體系，能夠大幅度降低開發時的工作量，同時避免引入協處理器所導致的規模大、保密性差等缺點。本文基于這條技術路線，設計了一種可編程專用語音編解碼芯片TR100。