A 20MHz Low Phase-Noise 0.35μm CMOS Crystal Oscillator GENG Jian-qiang, LAN Jia-long
(School of Electronic Engineering, University of Electronic Science and Technology of China Chengdu 610054 China)
Abstract The design procedure of a CMOS process integrating Colpitts cr ystal oscillator is described in detail by using the tools of Matlab and advanced design system (ADS). The small-signal analysis is performed both in the viewpoint of negative resistance and positive feedback. The analysis of condition for reliable start-up of oscillation and design guides for low phase noise is introduced. The measured phase noise is ?172dBc/Hz@10 kHz and the power dissipation is 0.36 mW at power supply 3V.
Key words Colpitts crystal oscillator; start-up; phase noise

Crystal oscillator is an integral part of radio frequency (RF) and digital devices. As well known, the analysis and design of oscillation can be based on two fundamental models, the negative-resistance model and the feedback model[1]. By using of the two models, the analysis and design procedure for a low phase noise 0.35 μm CMOS process integrating Colpitts crystal oscillator is proposed. We begin with the calculation of the minimum value of transconducdance necessary for starting up of oscillation in the viewpoint of negative resistance, and then by positive feedback model, the analysis of oscillation frequency, phase noise of oscillator will be performed and relevant design guides be presented. Finally, this design is confirmed by the experimental results.
1 Section
A crystal unit is equivalent to the following circuit as shown in Fig.1[2] . Now let’s look at a 20 MHz crystal’s electrical specifications used in this design: C0=5 pF, L1=6.3 mH, C1=0.01 pF, R1=40 .Ω